Search results for "Logic family"
showing 5 items of 5 documents
Analysis of compressor architectures in MOS current-mode logic
2010
This paper is concerned with the design and the comparison of different compressor architectures for high performance multipliers in MOS current-mode logic (MCML). More specifically, three architectures have been designed for 3-2, 4-2 and 5-2 compressors and two architectures for 7-2 compressors. The various implementations for each type of compressor have been compared one another. This investigation indicates that the architectures based exclusively on three-level MCML gates are the most suitable for MCML implementation in terms of speed, power consumption and area. Design guidelines are provided to improve compressor performance. All the compressors were designed in a TSMC 180nm CMOS tec…
FPGA-based embedded Logic Controllers
2014
In general case, reconfigurable logic controllers (RLC) are included into reactive digital embedded systems, carrying out control for several processes proceeding concurrently. The paper presents a practical application of a formal, rule-based specification language in Gentzen sequent logic, which is used as an intermediate textual description of a control interpreted Petri net. On the other hand exactly the same description serves also as logic design expressions, related with different versions of functionally equivalent concurrent state machine models, considered on Register Transfer Level. The symbolic rule-based specification of Petri net-based embedded Logic Controllers (LCs) can be s…
Progress towards innovative and energy efficient logic circuits
2020
Abstract The integration of superconductive nanowire logic memories and energy efficient computing Josephson logic is explored. Nanowire memories are based on the integration of switchable superconducting nanowires with a suitable magnetic material. These memories exploit the electro-thermal operation of the nanowires to efficiently store and read a magnetic state. In order to achieve proper memory operation a careful design of the nanowire assembly is necessary, as well as a proper choice of the magnetic material to be employed. At present several new superconducting logic families have been proposed, all tending to minimize the effect of losses in the digital Josephson circuits replacing …
Optimal implementation of neural activation functions in programmable logic using fuzzy logic
2006
Abstract This work presents a methodology for implementing neural activation function in programmable logic using tools from fuzzy logic. This methodology will allow implementing these intrinsic non-linear functions using comparators and simple linear modellers, easily implemented in programmable logic. This work is particularized to the case of a hyperbolic tangent, the most common function in neural models, showing the excellent results yielded with the proposed approximation.
Multiple-Output Walsh Function Generation for Minimum Orthogonality Error
1978
A hazard-free multiple-output Walsh function generator is presented which requires a minimum amount of hardware and is as fast as the integrated logic family employed for the implementation. However, the main characteristic of the instrument is the optimum performance from the viewpoint of the orthogonality of the function generated, as it is shown by the experimental verifications reported.